• DocumentCode
    2940820
  • Title

    A 20GHz ILFD with locking range of 31% for divide-by-4 and 15% for divide-by-8 using progressive mixing

  • Author

    Musa, Ahmed ; Okada, Kenichi ; Matsuzawa, Akira

  • Author_Institution
    Dept. Phys. Electron., Tokyo Inst. of Technol., Tokyo, Japan
  • fYear
    2011
  • fDate
    14-16 Nov. 2011
  • Firstpage
    85
  • Lastpage
    88
  • Abstract
    This paper proposes Progressive Mixing Injection Locked Frequency Divider (PMILFD) technique that enhances the locking range for higher division ratios. The wide locking range is achieved through the use of progressive mixing approach contrary to the conventional method that uses direct mixing to generate the injection signal. This allows for the use of lower and much stronger harmonics in the mixing process resulting in a stronger injection effect. Two 20GHz PMILFDs were designed based on this approach to perform division by 4 and 8 using 65nm CMOS process. The divide-by-4 PMILFD achieves a 7.9GHz (31.4%) locking range and the divide-by-8 achieves 3.4GHz (15.5%) while consuming 3.9mW and 7.1mW, respectively.
  • Keywords
    CMOS analogue integrated circuits; frequency dividers; integrated circuit design; CMOS process; PMILFD design; direct mixing; divide-by-4 PMILFD; divide-by-8 PMILFD; frequency 20 GHz; frequency 3.4 GHz; frequency 7.9 GHz; locking range; mixing process; power 3.9 mW; power 7.1 mW; progressive mixing injection locked frequency divider; size 65 nm; CMOS integrated circuits; Computer architecture; Delay; Frequency conversion; Harmonic analysis; Oscillators; Transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Circuits Conference (A-SSCC), 2011 IEEE Asian
  • Conference_Location
    Jeju
  • Print_ISBN
    978-1-4577-1784-0
  • Type

    conf

  • DOI
    10.1109/ASSCC.2011.6123610
  • Filename
    6123610