DocumentCode
2945034
Title
Verification by behavioral modeling-a multiprocessor system case
Author
Hu, Robert
Author_Institution
HaL Computer Systems, Campbell, CA, USA
fYear
1996
fDate
21-24 Oct 1996
Firstpage
43
Lastpage
45
Abstract
Behavioral modeling has many applications in design and verification of computer systems, such as performance study, logic design, test vector generation, verifications and bring-ups, etc. In this paper, a verification scheme for a cache-coherent multiprocessor system using behavioral modeling is presented. A behavioral model and a RTL design model are both driven with the same test cases. By comparing data and commands at certain interfaces in both models, we will be able to compare and verify the entire RTL design. The problem of handling the timing differences between the behavioral model and the RTL model is discussed. In addition, discussion on the implementation issues of such a scheme is presented
Keywords
cache storage; formal verification; multiprocessing systems; protocols; timing; RTL design model; behavioral modeling; cache-coherent multiprocessor system; protocols; timing differences; verification scheme; Application software; Computational modeling; Computer aided software engineering; Hardware; Logic design; Multiprocessing systems; Protocols; Robustness; State-space methods; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 1996., 2nd International Conference on
Conference_Location
Shanghai
Print_ISBN
7-5439-0940-5
Type
conf
DOI
10.1109/ICASIC.1996.562746
Filename
562746
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