A fast-marching time-domain layered finite-element reduction-recovery method for high-frequency VLSI design

In this paper, a fast-marching time-domain layered finite-element reduction-recovery (LAFE-RR) method is proposed for high-frequency modeling and simulation of large-scale integrated circuits. This method increases the time step of the LAFE-RR method by three orders of magnitude. In addition, it preserves the computational efficiency of the LAFE-RR method, i.e., the matrix reduction is achieved analytically from a three-dimensional layered system to a single-layer one regardless of the original problem size, and the sparsity of the reduced single-layer system matrix is the same as that of the original system matrix. The method applies to any arbitrarily-shaped multilayer structure. Numerical and experimental results are given to demonstrate its validity.