A double polarity CMOS peak-and-hold circuit for satellite radiation detection systems

In this paper we propose a new double polarity CMOS peak-and-hold circuit to be used in radiation detection systems. When such detection systems have to be placed on a satellite, it becomes very important to integrate the entire acquisition channel in a single ASIC, in order to reduce both the size and the power consumption without loosing in performance. Moreover, to improve the flexibility of the system, in order to use the same acquisition chain with different kinds of sensors, a circuit working with both negative and positive polarities input signal is required. This new topology of peak-and-hold circuit proposed is designed in a 0.8 mum CMOS technology, consumes 510 muW from a 5 V power supply and achieves 10 bits of resolution and linearity.