DocumentCode
2954078
Title
An interface ASIC design using FPGA
Author
Jianjun, Luo ; Xiancan, Deng
Author_Institution
Microelectron. CAE Center, Hangzhou Inst. of Electron. Eng., China
fYear
1996
fDate
21-24 Oct 1996
Firstpage
224
Lastpage
227
Abstract
An interface ASIC chip for smart stream tape recorder has been designed using CMOS gate array technology. It is realized by XILINX FPGA, and has good performance in a 1/4 inch stream tape recorder
Keywords
CMOS logic circuits; application specific integrated circuits; computer interfaces; field programmable gate arrays; peripheral interfaces; tape recorders; 0.25 inch; CMOS gate array; XILINX FPGA; interface ASIC chip; smart stream tape recorder; Application specific integrated circuits; CMOS technology; Computer aided engineering; Computer aided instruction; Design engineering; Field programmable gate arrays; Microelectronics; Optical computing; Read-write memory; Writing;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 1996., 2nd International Conference on
Conference_Location
Shanghai
Print_ISBN
7-5439-0940-5
Type
conf
DOI
10.1109/ICASIC.1996.562793
Filename
562793
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