DocumentCode
2954840
Title
TAB packaging at Hewlett-Packard
Author
Boyd, Melissa
Author_Institution
Hewlett-Packard, Corvallis, OR, USA
fYear
1989
fDate
22-24 May 1989
Firstpage
184
Lastpage
186
Abstract
A tape automated bonding (TAB) development project is discussed. In the early stages of the project many tough issues were faced. The choice of tape and bump technologies appropriate for the end users, equipment sourcing, and equipment setup and debugging are discussed. The first customer product, a 104L CMOS chip, was qualified and released to production in early 1988. Since that date, the process has ramped up to production volumes. Data regarding reliability, failure modes, and other key process parameters are presented
Keywords
circuit reliability; failure analysis; integrated circuit manufacture; lead bonding; surface mount technology; 104L CMOS chip; Hewlett-Packard; SMT; TAB packaging; bump technologies; debugging; end users; equipment setup; equipment sourcing; failure modes; process parameters; production volumes; reliability; surface mounting; tape automated bonding; tape technologies; Application specific integrated circuits; CMOS technology; Costs; Encapsulation; Gold; Integrated circuit packaging; Integrated circuit technology; Lead; Production; Wafer bonding;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components Conference, 1989. Proceedings., 39th
Conference_Location
Houston, TX
Type
conf
DOI
10.1109/ECC.1989.77747
Filename
77747
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