DocumentCode
2955130
Title
Reducing the switching activity of modified SAFF flip-flop for low power applications
Author
Darwish, Tarek ; Bayoumi, Magdy
Author_Institution
Center for Adv. Comput. Studies, Louisiana Univ., Lafayette, LA, USA
fYear
2002
fDate
11-13 Dec. 2002
Firstpage
96
Lastpage
99
Abstract
The design and analysis of flip-flops is a critical issue in the design of high-performance and low power systems. In this paper, we propose a low power and a high-speed flip-flop (LP-SAFF) based on the Sense Amplifier Flip-Flop (SAFF). The saving in power consumption was achieved by reducing the switching activity at major internal nodes of the original SAFF. Our simulations show that this new flip-flop achieves major reduction in power consumption (25%-80%) and increases its performance by 5%-16%.
Keywords
amplifiers; circuit simulation; flip-flops; logic design; low-power electronics; power consumption; switching circuits; LP-SAFF; SAFF; low power SAFF; low power application; power consumption; sense amplifier flip-flop; switching activity; Application software; Clocks; Energy consumption; Flip-flops; Frequency; Power system analysis computing; Power system simulation; Timing; Very large scale integration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics, The 14th International Conference on 2002 - ICM
Print_ISBN
0-7803-7573-4
Type
conf
DOI
10.1109/ICM-02.2002.1161505
Filename
1161505
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