• DocumentCode
    2956118
  • Title

    Error Correction Codes for SEU and SEFI Tolerant Memory Systems

  • Author

    Pontarelli, S. ; Cardarilli, G.C. ; Re, M. ; Salsano, A.

  • Author_Institution
    Univ. of Rome "Tor Vergata", Rome, Italy
  • fYear
    2009
  • fDate
    7-9 Oct. 2009
  • Firstpage
    425
  • Lastpage
    430
  • Abstract
    In this paper a modification of the Hsiao SEC-DED (Single Error Correction, Double Error Detection) code is presented. The proposed code is still a SEC-DED code, but it is also able to correct a byte erasure. This code has been developed to protect the memory chips of a spaceborne computer against SEU (Single Event Upset) and SEFI (Single Event Functional Interruption) faults. The code rate of our proposed code is the same of the Hsiao code and is particularly suitable for byte organized 64-bits memory systems. In fact, for these systems a (72,64) code can be constructed and a memory organization based on nine chips can be designed. The byte erasure correction allows to tolerate the occurrence of a SEFI fault in one of the memory chips without data loss.
  • Keywords
    error correction codes; fault tolerance; integrated memory circuits; radiation hardening (electronics); Hsiao code; byte erasure; error correction codes; memory chips; single event functional interruption; single event upset; spaceborne computer; word length 64 bit; Circuit faults; Computer errors; Error correction; Error correction codes; Face detection; Fault tolerant systems; Protection; Single event upset; Switches; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Defect and Fault Tolerance in VLSI Systems, 2009. DFT '09. 24th IEEE International Symposium on
  • Conference_Location
    Chicago, IL
  • ISSN
    1550-5774
  • Print_ISBN
    978-0-7695-3839-6
  • Type

    conf

  • DOI
    10.1109/DFT.2009.8
  • Filename
    5372229