• DocumentCode
    2958233
  • Title

    Failure mode analysis for TAB inner lead bonding

  • Author

    Jee, Yong ; Andrews, Marshall

  • Author_Institution
    Microelectron. Comput. Technol. Corp., Austin, TX, USA
  • fYear
    1989
  • fDate
    22-24 May 1989
  • Firstpage
    325
  • Lastpage
    334
  • Abstract
    The performance of tape-automated inner-lead gang bonding in the interconnection of VLSI devices was studied, using failure modes, failure probability curves, and Weibull distribution curves. 129-lead tin-plated copper tapes were bonded to annealed gold bumps with a thermode at 450°C and 40 psig and pull-tested with a micro-pull tester. Several different failure modes were observed during the pull test: lead break in span, lead break at pad, lead separation from bump, bump fracture, bump lift, and silicon substrate cratering. The major failure mode (half of the failures) was lead break, which indicates good bonding. Lead separation from bump was related to nonuniformity of the eutective layer, uneven bonding pressure caused by inadequate planarization, and surface roughness or contamination of leads and bumps. High bonding pressure and uneven leads produced deformation and bump fractures during pulling. The frequency of bump lift was very low. Thermal stress and microcracks are proposed as factors affecting bump lift and silicon substrate cratering. Failure probability curves showed the distribution of pull strength and failure probability, and Weibull distribution curves indicated the dispersion of pull strength data
  • Keywords
    VLSI; circuit reliability; failure analysis; lead bonding; probability; statistical analysis; surface mount technology; thermal stress cracking; 129-lead tin-plated copper tapes; 450 degC; Cu-Sn-Au; SMT; Si; TAB; VLSI device interconnection; Weibull distribution curves; annealed gold bumps; bump fracture; bump lead separation; bump lift; bumps contamination; eutective layer nonuniformity; failure mode analysis; failure modes; failure probability curves; inadequate planarization; leads contamination; micro-pull tester; microcracks; pad lead break; pull strength; pulling bump fractures; pulling deformation; silicon substrate cratering; span lead break; surface roughness; tape-automated inner-lead gang bonding; thermal stress; thermode; uneven bonding pressure; Annealing; Bonding; Copper; Failure analysis; Gold; Silicon; Testing; Thermal stresses; Very large scale integration; Weibull distribution;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components Conference, 1989. Proceedings., 39th
  • Conference_Location
    Houston, TX
  • Type

    conf

  • DOI
    10.1109/ECC.1989.77767
  • Filename
    77767