DocumentCode
2959188
Title
An algorithmic incremental and iterative development method to parallelize dusty-deck FORTRAN HPC codes in GPGPUs using CUDA
Author
Ghaemian, Nima ; Sharifi, Mohsen ; Minaei, Behrouz ; Orujov, Ramin
Author_Institution
Res. Lab., Iran Univ. of Sci. & Technol., Tehran, Iran
fYear
2009
fDate
14-16 Oct. 2009
Firstpage
1
Lastpage
7
Abstract
State-of-the-art high-speed and economical graphic card processors (GPUs) provide high multiprocessing power for high performance computing (HPC). But software development for high performance computing is profound and requires a good comprehension of algorithms, applications, and architectures. This paper outlines an incremental and iterative software development process for porting dusty-deck HPC application source codes to a selected GPU-enabled architecture. A new type of dependency, namely recurrent transmission dependency, is introduced. Some experiments are reported.
Keywords
FORTRAN; computer graphic equipment; parallel languages; software engineering; CUDA; FORTRAN HPC codes; GPGPU; algorithmic incremental development; graphic card processors; high performance computing; iterative development; software development; Application software; Computer architecture; High performance computing; Iterative algorithms; Iterative methods; Kernel; Laboratories; Programming; Registers; Yarn; CUDA; GPGPU; High Performance Computing; Incremental Methodology; Iterative Methodology; Recurrent Transmission Dependency; Software Development;
fLanguage
English
Publisher
ieee
Conference_Titel
Application of Information and Communication Technologies, 2009. AICT 2009. International Conference on
Conference_Location
Baku
Print_ISBN
978-1-4244-4739-8
Electronic_ISBN
978-1-4244-4740-4
Type
conf
DOI
10.1109/ICAICT.2009.5372496
Filename
5372496
Link To Document