DocumentCode
2959199
Title
Optimizing Resistances and Capacitances of a Continuous-Time ΣΔ ADC
Author
De Lamarre, Laurent ; Louërat, Marie-Minerve ; Kaiser, Andreas
Author_Institution
Univ. Pierre et Marie Curie, Paris
fYear
2006
fDate
10-13 Dec. 2006
Firstpage
419
Lastpage
422
Abstract
The integration capacitor is an important issue when being faced with the power consumption of a ΣΔ analog-to-digital converter. In this paper, we show how the integration capacitance can be derived from signal to noise ratio specifications. In order to decrease the total power consumption of the ΣΔ modulator, a method that optimizes the value of the integrator stage capacitors in the modulator loop filter is proposed.
Keywords
capacitors; continuous time filters; modulators; sigma-delta modulation; analog-to-digital converter; continuous-time ΣΔ ADC; integration capacitor; integrator stage capacitors; modulator loop filter; power consumption; signal to noise ratio specification; Capacitance; Capacitors; Circuits; Costs; Delay; Energy consumption; Filtering; Filters; Optimization methods; Signal to noise ratio;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 2006. ICECS '06. 13th IEEE International Conference on
Conference_Location
Nice
Print_ISBN
1-4244-0394-4
Electronic_ISBN
1-4244-0395-2
Type
conf
DOI
10.1109/ICECS.2006.379814
Filename
4263392
Link To Document