• DocumentCode
    2959805
  • Title

    Optimising process parameters for flip chip stencil printing using Taguchi´s method

  • Author

    Rajkumar, D. ; Nguty, T. ; Ekere, N.N.

  • Author_Institution
    Sch. of Aeronaut. Mech. & Manuf. Eng., Salford Univ., UK
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    382
  • Lastpage
    388
  • Abstract
    Solder paste printing is an important process in surface mount device assembly using the reflow soldering technique. There is wide agreement in the industry that the paste printing process accounts for the majority of assembly defects, and most defects originate from poor understanding of the effect of printing process parameters on printing performance and the nature of their interactions. The key solder paste printing process parameters considered in this study are the squeegee pressure, squeegee speed, stencil-substrate separation speed and squeegee print direction. Previous work shows that these process parameters affect printing process performance. As the current product miniaturisation trend continues for hand-held consumer products, area array type package solutions such as chip scale packages and flip chip are now being designed into products. Assembly of these devices requires the printing of very small solder paste deposits consistently from pad to pad, and from board to board. This paper concerns the determination of the solder paste printing process window for flip chip assembly applications. Five different solder paste formulations, specially formulated for flip-chip assembly, were evaluated as part of a broader study on low cost solder bumped flip-chip assembly. The results were also used for establishing guidelines for printing solder pastes for both solder bumping and the flip-chip assembly process. The experimental design for the study was based on the Taguchi method. A 2-level and 4-factor orthogonal array was used to investigate the main effects
  • Keywords
    Taguchi methods; design of experiments; flip-chip devices; integrated circuit interconnections; integrated circuit packaging; microassembling; optimisation; reflow soldering; Taguchi method; area array type package; assembly; assembly defects; board to board consistency; chip scale packages; experimental design; flip chip; flip chip assembly applications; flip chip stencil printing; flip-chip assembly process; hand-held consumer products; orthogonal array; pad to pad consistency; paste printing process; printing performance; printing process parameters; printing process performance; process parameter optimization; process parameters; product miniaturisation; reflow soldering; solder bumped flip-chip assembly; solder bumping; solder paste deposits; solder paste formulations; solder paste printing; solder paste printing process parameters; solder paste printing process window; solder pastes; squeegee pressure; squeegee print direction; squeegee speed; stencil-substrate separation speed; surface mount device assembly; Assembly; Chip scale packaging; Consumer products; Costs; Design for experiments; Flip chip; Guidelines; Printing; Product design; Reflow soldering;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Manufacturing Technology Symposium, 2000. Twenty-Sixth IEEE/CPMT International
  • Conference_Location
    Santa Clara, CA
  • ISSN
    1089-8190
  • Print_ISBN
    0-7803-6482-1
  • Type

    conf

  • DOI
    10.1109/IEMT.2000.910751
  • Filename
    910751