DocumentCode
2959810
Title
Error Detection Code Efficiency for Secure Chips
Author
Maingot, V. ; Leveugle, R.
Author_Institution
TIMA Lab., Grenoble
fYear
2006
fDate
10-13 Dec. 2006
Firstpage
561
Lastpage
564
Abstract
The robustness of a chip designed for security-related applications depends on its capability to globally resist to various types of attacks. This paper deals with protections against non invasive or semi invasive attacks. The two main categories are attacks based on power consumption (either by monitoring the current, e.g. DPA, or by monitoring the electromagnetic emissions, i.e. EMA) and attacks based on the injection of faults during the application execution (DFA). Error detecting codes are often proposed as a basis for countermeasures against DFA. This paper discusses the influence of the choice of the code on the global robustness of the circuit, taking into account both DPA and DFA.
Keywords
error detection codes; security of data; application execution; error detecting codes; error detection code efficiency; fault injection; noninvasive attack; power consumption; secure chips; semi invasive attack; Circuit faults; Cryptography; Doped fiber amplifiers; Energy consumption; Monitoring; Packaging; Protection; Redundancy; Robustness; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 2006. ICECS '06. 13th IEEE International Conference on
Conference_Location
Nice
Print_ISBN
1-4244-0395-2
Electronic_ISBN
1-4244-0395-2
Type
conf
DOI
10.1109/ICECS.2006.379850
Filename
4263428
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