Continuous-Time Complex Bandpass Modulator: Key Component for Highly Digitized Receiver

This paper presents a highly digitized receiver for a single chip digital radio receiver. The RF front-end has been based on a low-IF architecture and does not require any variable gain or filtering blocks. The full dynamic range of the low-IF signals is converted into the digital domain by a low-power high-resolution continuous-time (CT) DeltaSigma analog-to-digital converter (ADC). The high degree of digitization leads to design flexibility with respect to changing standards and scalability in future CMOS generations. Fifth order CT complex bandpass (BP) DeltaSigma modulator was planned for duo standard, Bluetooth and WiFi to illustrate the receiver multistandard effectiveness. The quadrature modulator digitizes complex analog I/Q input signals at 5 MHz intermediate frequency and operates with a clock frequency of 200 MHz. The modulator achieves a peak SNR of 87.48 dB at 10 MHz bandwidth for IEEE 802.11b and 96.76 dB at 1 MHz bandwidth for Bluetooth.