A 3.110.6 GHz CMOS Direct-Conversion Receiver for UWB Applications

Author

Wu, Chung-Yu ; Lo, Yi-Kai ; Chen, Min-Chiao

Author_Institution

Nat. Chiao Tung Univ., Hsinchu

fYear

2006

fDate

10-13 Dec. 2006

Firstpage

1328

Lastpage

1331

Abstract

In this paper, a 3.1~10.6 GHz fully integrated low-power CMOS direct-conversion receiver for ultra-wideband (UWB) applications is proposed and analyzed. The proposed receiver consists of a wideband low-noise amplifier (WLNA), quadrature down-conversion mixers, output I/Q buffers and a carrier generator. This chip was designed in 0.13-mum CMOS technology. According to the simulation results, the proposed receiver has noise figure (NF) of 4.1~7.1 dB, receiver voltage gain of 22 dB, and input-referred 1-dB compression point (P_1dB) of -22~-26 dBm and third-order intercept point (IIP₃) of -12~-16 dBm. It consumes 38.4 mW from 1.2 V power supply.

Keywords

CMOS analogue integrated circuits; low noise amplifiers; microwave receivers; ultra wideband communication; carrier generator; frequency 3.1 GHz to 10.6 GHz; gain 22 dB; integrated low-power CMOS direct-conversion receiver; noise figure; noise figure 4.1 dB to 7.1 dB; output I/Q buffers; power 38.4 mW; quadrature down-conversion mixers; size 0.13 mum; ultra wideband applications; voltage 1.2 V; wideband low-noise amplifier; Baseband; CMOS technology; Circuit simulation; DC generators; Impedance matching; Linearity; Noise measurement; Radio frequency; Signal generators; Wideband;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 2006. ICECS '06. 13th IEEE International Conference on

Conference_Location

Nice

Print_ISBN

1-4244-0395-2

Electronic_ISBN

1-4244-0395-2

Type

conf

DOI

10.1109/ICECS.2006.379727

Filename

4263620