DocumentCode
2970072
Title
Circuit implementation for transform and quantization operations of H.264/MPEG-4/VC-1 video decoder
Author
Lee, Seonyoung ; Cho, Kyeongsoon
Author_Institution
Hankuk Univ. of Foreign Studies, Seoul
fYear
2007
fDate
2-5 Sept. 2007
Firstpage
102
Lastpage
107
Abstract
Current trend of digital convergence leads to the need of the video decoder that can support the multiple standards such as H.264, MPEG-4 and VC-1. We implemented a circuit to perform the transform and quantization operations for the three video compression standards. Instead of designing the circuit for each standard separately, we analyzed the transform and quantization operations in detail to find the possibilities of sharing resources such as adders and multipliers, and finally devised a common architecture that can be applied to all of them. The resultant circuit is efficient in terms of its size compared to the case of separate implementation for each standard.
Keywords
adders; code standards; decoding; integrated circuit design; logic design; multiplying circuits; video coding; H.264; MPEG-4; VC-1; circuit implementation; digital convergence; quantization operations; transform operations; video compression standards; video decoder; Adders; Circuits; Convergence; Decoding; Discrete cosine transforms; Equations; MPEG 4 Standard; Quantization; Size control; Video compression;
fLanguage
English
Publisher
ieee
Conference_Titel
Design & Technology of Integrated Systems in Nanoscale Era, 2007. DTIS. International Conference on
Conference_Location
Rabat
Print_ISBN
978-1-4244-1277-8
Electronic_ISBN
978-1-4244-1278-5
Type
conf
DOI
10.1109/DTIS.2007.4449501
Filename
4449501
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