DocumentCode
2974336
Title
Communication synthesis for distributed embedded systems
Author
Ti-Yen Yen ; Wolf, W.
Author_Institution
Quickturn Design Syst. Inc., Mountain View, CA, USA
fYear
1995
fDate
5-9 Nov. 1995
Firstpage
288
Lastpage
294
Abstract
Communication synthesis is an essential step in hardware-software co-synthesis: many embedded systems use custom communication topologies and the communication links are often a significant part of the system cost. This paper describes new techniques for the analysis and synthesis of the communication requirements of embedded systems during co-synthesis. Our analysis algorithm derives delay bounds on communication in the system given an allocation of messages to links. This analysis algorithm is used by our synthesis algorithm to choose the required communication links in the system and assign interprocess communication to the links. Experimental results show that our algorithm finds good communication architectures in small amounts of CPU time.
Keywords
CAD; distributed processing; real-time systems; system buses; analysis algorithm; co-synthesis; communication links; delay bounds; distributed embedded systems; embedded systems; hardware-software co-synthesis; interprocess communication; synthesis algorithm; Algorithm design and analysis; Costs; Delay estimation; Embedded system; Engines; Hardware; Nonlinear equations; Real time systems; Scheduling algorithm; Topology;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design, 1995. ICCAD-95. Digest of Technical Papers., 1995 IEEE/ACM International Conference on
Conference_Location
San Jose, CA, USA
ISSN
1092-3152
Print_ISBN
0-8186-8200-0
Type
conf
DOI
10.1109/ICCAD.1995.480025
Filename
480025
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