DocumentCode

2978198

Title

Design And Performance Of A Coherent Cache For Parallel Logic Programming Architectures

Author

Goto, Atsuhiro ; Matsumoto, Akira ; Tick, Evan

Author_Institution

Institute for New Generation Computer Technology (ICOT)

fYear

1989

fDate

28 May-1 Jun 1989

Firstpage

25

Lastpage

33

Keywords

Access protocols; Bandwidth; Computer architecture; Concurrent computing; Design optimization; Hardware; Logic programming; Paper technology; Permission; Writing;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer Architecture, 1989. The 16th Annual International Symposium on

ISSN

1063-6897

Print_ISBN

0-8186-8948-X

Type

conf

DOI

10.1109/ISCA.1989.714521

Filename

714521