DocumentCode
2978383
Title
The means of the differential amplifier input offset voltage reduction
Author
Baskys, A.
Author_Institution
Dept. of Comput. Eng., VGTU, Vilnius, Lithuania
fYear
2010
fDate
4-6 Oct. 2010
Firstpage
103
Lastpage
106
Abstract
The input offset voltage of the differential amplifier based on the bipolar junction transistors, which operate at high current density, is analysed in this work. An analytical approach based on the equations in the explicit form is used to determine the input offset voltage reduction means. The obtained results are tested using numerical simulation of the differential amplifier.
Keywords
bipolar transistors; differential amplifiers; numerical analysis; voltage control; bipolar junction transistors; differential amplifier; input offset voltage reduction means; numerical simulation; Current density; Differential amplifiers; Equations; Integrated circuits; Junctions; Mathematical model; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Conference (BEC), 2010 12th Biennial Baltic
Conference_Location
Tallinn
ISSN
1736-3705
Print_ISBN
978-1-4244-7356-4
Electronic_ISBN
1736-3705
Type
conf
DOI
10.1109/BEC.2010.5629805
Filename
5629805
Link To Document