DocumentCode
2980289
Title
Optimised space vector switching sequences for multilevel inverters
Author
McGrath, B.P. ; Holmes, D.G. ; Lipo, T.A.
Author_Institution
Dept. of Electr. & Comput. Syst. Eng., Monash Univ., Clayton, Vic., Australia
Volume
2
fYear
2001
fDate
2001
Firstpage
1123
Abstract
Previous work has shown that space vector modulation and carrier modulation for two-level inverters achieve the same phase leg switching sequences when appropriate zero sequence offsets are added to the reference waveforms for carrier modulation. This paper presents a similar equivalence between the phase disposition carrier and space vector modulation strategies applied to diode clamped, cascaded N-level or hybrid multilevel inverters. By analysis of the time integral trajectory of the converter voltage, the paper shows that the optimal harmonic profile for a space vector modulator occurs when the two middle space vectors are centred in each switching cycle. The required zero sequence offset to achieve this centring for an equivalent carrier based modulator is then determined. The results can be applied to any multilevel converter topology without differentiation. Discontinuous behaviour is also examined, with the space vector and carrier based modulation methods shown to similarly produce identical performance. Both simulation and experimental results are presented
Keywords
DC-AC power convertors; circuit optimisation; harmonic distortion; invertors; modulation; power conversion harmonics; switching circuits; cascaded N-level; diode clamped; discontinuous behaviour; equivalent carrier based modulator; hybrid multilevel inverters; multilevel inverters; optimal harmonic profile; optimised space vector switching sequences; phase disposition carrier; phase leg switching sequences; space vector modulation strategies; switching cycle; time integral trajectory; zero sequence offset; zero sequence offsets; Inverters; Leg; Phase modulation; Semiconductor diodes; Support vector machines; Switches; Switching converters; Systems engineering and theory; Topology; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Applied Power Electronics Conference and Exposition, 2001. APEC 2001. Sixteenth Annual IEEE
Conference_Location
Anaheim, CA
Print_ISBN
0-7803-6618-2
Type
conf
DOI
10.1109/APEC.2001.912507
Filename
912507
Link To Document