DocumentCode
2981003
Title
Evaluation of RF and Logic Performance for 80 nm InAs/InGaAs Composite Channel HEMTs Using Gate Sinking Technology
Author
Kuo, Chien-I ; Hsu, Heng-Tung ; Chang, Chia-Yuan ; Chang, Edward Yi ; Hsu, Heng-Shou
Author_Institution
Nat. Chiao-Tung Univ., Hsinchu
fYear
2007
fDate
20-22 Dec. 2007
Firstpage
255
Lastpage
258
Abstract
80-nm-gate In0.7Ga0.3As/InAs/In0.7Ga0.3As composite channel high-electron mobility transistors (HEMTs) fabricated using platinum (Pt) buried gate as the Schottky contact metal were evaluated for RF and logic application. After gate sinking at the 250degC for 3 minutes, the device exhibited a high gm value of 1590 mS/mm at Vd = 0.5 V and the current gain cutoff frequency fT was measured to be 494 GHz. The intrinsic gate delay time was calculated to be 0.78 psec at supply voltage of 0.6 V. This is the highest fT achieved for 80 nm gate length HEMT devices. These superior performances are attributed to the reduction of distance between gate and channel, and the reduction of parasitic gate capacitances during gate-sinking process.
Keywords
Schottky barriers; arsenic compounds; gallium compounds; high electron mobility transistors; indium compounds; platinum; InGaAs-InAs-InGaAs; Pt; RF evaluation; Schottky contact metal; composite channel high-electron mobility transistors; frequency 494 GHz; gate sinking technology; gate-sinking process; logic performance; parasitic gate capacitances; platinum buried gate; size 80 nm; temperature 250 C; time 3 min; voltage 0.5 V; voltage 0.6 V; Current measurement; Cutoff frequency; Frequency measurement; HEMTs; Indium gallium arsenide; Logic devices; MODFETs; Platinum; Radio frequency; Schottky barriers;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices and Solid-State Circuits, 2007. EDSSC 2007. IEEE Conference on
Conference_Location
Tainan
Print_ISBN
978-1-4244-0637-1
Electronic_ISBN
978-1-4244-0637-1
Type
conf
DOI
10.1109/EDSSC.2007.4450110
Filename
4450110
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