DocumentCode
2988261
Title
Modified Booth 1´s complement and modulo 2n-1 multipliers
Author
Efstathiou, C. ; Vergos, H.T.
Author_Institution
Dept. of Inf., TEI of Athens, Greece
Volume
2
fYear
2000
fDate
2000
Firstpage
637
Abstract
In this paper we derive a novel modified Booth multiplier architecture which is based on 1´s complement arithmetic. We also extend our theory to the design of module 2n-1 multipliers. The proposed 1´s complement modified Booth multipliers have an execution latency which is approximately the same as that offered by their 2´s complement counterparts with a completely regular structure. Therefore, pipelined implementations of them can be derived in a straightforward manner. The proposed modified Booth module 2n-1 multipliers can find great applicability in Residue Number System (RNS) applications
Keywords
integrated logic circuits; multiplying circuits; pipeline arithmetic; residue number systems; 1´s complement arithmetic; RNS applications; execution latency; modified Booth multiplier architecture; module 2n-1 multipliers; pipelined implementations; regular structure; residue number system applications; Adders; Computer architecture; Counting circuits; Delay; Digital arithmetic; Informatics; Integrated circuit technology; Pipeline processing; Throughput; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 2000. ICECS 2000. The 7th IEEE International Conference on
Conference_Location
Jounieh
Print_ISBN
0-7803-6542-9
Type
conf
DOI
10.1109/ICECS.2000.912958
Filename
912958
Link To Document