Modeling MARTE Sequence Diagram with Timing Pi-Calculus

Modeling and Analysis of Real-Time and Embedded Systems specification (MARTE) is a profile of the Unified Modeling Language (UML) for model driven development of real-time and embedded systems. To describe formally the semantics of MARTE sequence diagram (MARTE SD), we introduce the timing pi-calculus, a new variant of the pi-calculus, in this paper. The good feature of the timing pi-calculus is that it can handle time elapse and timer events. We provide both its syntax and semantics. With the new calculus, we then model MARTE SD elements, and give their precise semantics. Our formal framework may facilitate the reliability and consistency analysis of MARTE SD design process.