DocumentCode
2994901
Title
A novel network node architecture for high performance and function flexibility
Author
Murooka, Takahiro ; Takahara, At Sushi ; Miyazaki, Toshiaki
Author_Institution
NTT Network Innovation Labs., Kanagawa, Japan
fYear
2001
fDate
2001
Firstpage
551
Lastpage
557
Abstract
We developed a flexible network node that is tuned for high-speed and multilayer packet manipulation. The key idea is a dynamic function assignment mechanism; each packet processing task is assigned to several processing modules in an on-the-fly manner and incoming packets are processed in them. With this mechanism, we can freely arrange the modules and add extra ones if more processing power is needed. In addition, the processing modules are realized using field programmable gate arrays (FPGAs) and microprocessing units (MPUs). Thus, the functionality of each module can be dynamically changed at any time. In this paper, the system concept and its implementation are described with an example application
Keywords
Internet; field programmable gate arrays; packet switching; quality of service; telecommunication network routing; dynamic function assignment; field programmable gate arrays; function flexibility; incoming packets; microprocessing units; multilayer packet manipulation; network node architecture; packet processing task; processing modules; processing power; Electronic mail; Engines; Field programmable gate arrays; Laboratories; Open systems; Payloads; Prototypes; Quality of service; Technological innovation; Web and internet services;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2001. Proceedings of the ASP-DAC 2001. Asia and South Pacific
Conference_Location
Yokohama
Print_ISBN
0-7803-6633-6
Type
conf
DOI
10.1109/ASPDAC.2001.913366
Filename
913366
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