DocumentCode
2996606
Title
Hardware Implementation of Image Space Reconstruction Algorithm using FPGAs
Author
Morales, Javier ; Medero, Nelson ; Santiago, Nayda G. ; Sosa, Julio
Author_Institution
Electrical and Computer Engineering Department, University of Puerto Rico, Mayaguez Campus, Mayaguez, Puerto Rico 00680-5000. Email: javier.morales@ece.uprm.edu
Volume
1
fYear
2006
fDate
6-9 Aug. 2006
Firstpage
433
Lastpage
436
Abstract
The Image Space Reconstruction Algorithm (ISRA) has been used in hyperspectral imaging applications to monitor changes in the environment and specifically, changes in coral reef, mangrove, and sand in coastal areas. This algorithm is one of the set of iterative methods used in the hyperspectral imaging area to estimate abundance. However, ISRA is highly computational, making it difficult to obtain results in a timely manner. In this paper we present the use of specialized hardware in the implementation of this algorithm, specifically the use of VHDL and FPGAs. The implementation of ISRA algorithm has been divided into hardware and software units. The hardware units were implemented on a Xilinx Virtex II Pro XC2VP30 FPGA and the software was implemented on the Xilinx Microblaze soft processor. This illustrates that this approach is a design alternative for iterative hyperspectral imaging algorithms. The main bottleneck found in this implementations was data transfer.
Keywords
Algorithm design and analysis; Field programmable gate arrays; Hardware; Hyperspectral imaging; Iterative algorithms; Iterative methods; Monitoring; Reconstruction algorithms; Sea measurements; Software algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2006. MWSCAS '06. 49th IEEE International Midwest Symposium on
Conference_Location
San Juan, PR
ISSN
1548-3746
Print_ISBN
1-4244-0172-0
Electronic_ISBN
1548-3746
Type
conf
DOI
10.1109/MWSCAS.2006.382091
Filename
4267168
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