High performance multilevel interconnection system with stacked interlayer dielectrics by plasma CVD and bias sputtering

Author

Abe, M. ; Mase, Y. ; Katsura, T. ; Hirata, O. ; Yamamoto, T. ; Koguchi, S.

Author_Institution

Toshiba Corp., Kawasaki, Japan

fYear

1989

fDate

12-13 Jun 1989

Firstpage

404

Lastpage

410

Abstract

A novel multilevel interconnection system for bipolar or BiCMOS LSIs was developed. Bias sputtered quartz (BSQ) and plasma CVD SiO(P-SiO) constituted the stacked interlayer, making it possible to smooth high aspect ratio (0.82) topography. The electrical properties of the films and the manufacturing-process damage were investigated. The results show that the stacked structure offers good electrical stability and reliability. This system was successfully applied to real devices

Keywords

BIMOS integrated circuits; VLSI; bipolar integrated circuits; chemical vapour deposition; dielectric thin films; integrated circuit technology; metallisation; silicon compounds; sputtered coatings; BSQ; BiCMOS; SiO₂; VLSI; bias sputtered quartz; bias sputtering; electrical properties; electrical stability; manufacturing-process damage; multilevel interconnection; multilevel interconnection system; plasma CVD; reliability; smooth high aspect ratio; stacked interlayer dielectrics; Coatings; Dielectrics; Manufacturing processes; Plasma applications; Polyimides; Resists; Sputter etching; Sputtering; Surfaces; Throughput;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Multilevel Interconnection Conference, 1989. Proceedings., Sixth International IEEE

Conference_Location

Santa Clara, CA

Type

conf

DOI

10.1109/VMIC.1989.78001

Filename

78001