• DocumentCode
    3003443
  • Title

    FaRBS: A new PoF based VLSI reliability prediction method

  • Author

    Qin, Jin ; Avshalom, Hava ; Bernstein, Joseph B.

  • Author_Institution
    Univ. of Sci. & Technol. of China, Hefei, China
  • fYear
    2011
  • fDate
    24-27 Jan. 2011
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    FaRBS (Failure Rate Based Simulation Program with Integrated Circuit Emphasis) is a new physics-of-failure based Very Large Scale Integration (VLSI) circuit reliability prediction method. With multiple failure mechanisms inh erently modeled and analyzed, FaRBS will make reliability engineers´ life much easier by directly revealing each stress´s acceleration effect at system level, thus helping reliability engineers carry out system level VLSI reliability predictions and derating/uprating analyses. Based on Physics-of-Failure (PoF) models of intrinsic failure mechanisms, FaRBS takes a straightforward top-down, bottom-up approach to reduce both modeling and prediction complexity. Detailed application breakdown from the system level reveals bottom-level device´s operation profile. Devicelevel reliability characterization provides accurate operation-ba sed dynamic stress modeling by utilizing the physics-of-failure models. For each failure mechanism, the best-fit lifetime distribution is selected to provide the reliability prediction. With the bottom level device reliability prediction, the application-specific circuit and corresponding system reliability is further predicted by considering the system structure. To demonstrate FaRBS and verify its prediction capability, reliability predictions were performed on a microcontroller, DRAM and microprocessor. The predicted failure rates were compared with field data (from 2002 to 20 09) and demonstrate that the prediction agrees very well with the real failure rates.
  • Keywords
    DRAM chips; VLSI; integrated circuit modelling; integrated circuit reliability; microcontrollers; DRAM; VLSI reliability prediction method; Very Large Scale Integration; circuit reliability prediction method; failure rate based simulation program; integrated circuit emphasis; microcontroller; microprocessor; physics-of-failure; Failure analysis; Integrated circuit modeling; Integrated circuit reliability; Predictive models; Random access memory; Stress; DRAM; VLSI; microprocessor; physics of failure; reliability prediction;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability and Maintainability Symposium (RAMS), 2011 Proceedings - Annual
  • Conference_Location
    Lake Buena Vista, FL
  • ISSN
    0149-144X
  • Print_ISBN
    978-1-4244-8857-5
  • Type

    conf

  • DOI
    10.1109/RAMS.2011.5754493
  • Filename
    5754493