20 nm tri-gate SONOS memory cells with multi-level operation

Fast programmable tri-gate oxide-nitride-oxide (ONO) transistor memory cells with sub-10 nm fin width and gate lengths down to L_G = 20 nm have been fabricated and successfully operated in multi-level mode for the first time. In spite of thick tunnel oxides required for reliable retention, the devices were optimized for either two level operation with very short program and erase times of t_P = 20 μs and t_E = 1 ms and threshold voltage shifts of ΔV_th ∼ 3 V or for multi-level mode with t_PE = 2 ms and ΔV_th < 4 V. In addition, a simple 6F² NOR array scheme is proposed that meets the large ΔV_th shift specific read and write disturb requirements thus allowing for a cost effective high density 3F²/bit nonvolatile memory for data storage applications.