Development of VHDL model for fixed-point Discrete Wavelet Transform

The wavelet transform is an efficient technique for multi-resolution analysis of non-stationary and fast transient signals. For this reason, wavelet transform has been widely applied in signal analysis through processing, encoding, denoising and encrypting. The objective of this paper is to represent the development process of VHSIC (Very High Speed Integrated Circuit) Hardware Description Language (VHDL) based wavelet transform model. The VHDL model development is based on fixed-point arithmetic. A fixed-point number represents a number which has fixed number of digits after and before of the radix point and of real data type. Discrete Wavelet Transform (DWT) is a method that uses wavelet analyser in which case the signals composed into small pieces preserving both time and frequency properties. Out of the mother wavelet functions family, 2nd order of Daubechies (4-tap) has been widely used in denoising various types of biomedical signals. This research work involves with the VHDL modeling of Daubechies wavelet which is developed by Ingrid Daubechies. The functionality of VHDL model for DWT structure has been tested successfully and its performance level is in the satisfactory region (up to two decimal points of precision).