DocumentCode
3009179
Title
Switch-stacks: A scheme for microtasking nested parallel loops
Author
Chow, Jyh-Herng ; Harrison, Williams Ludwell, III
Author_Institution
Center for Supercomput. Res. & Dev., Illinois Univ., Urbana, IL, USA
fYear
1990
fDate
12-16 Nov 1990
Firstpage
190
Lastpage
199
Abstract
The authors discuss run-time microtasking support for executing nested parallel loops on a shared-memory multiprocessor system, and present a scheme called switch-stacks for implementing such support. They first discuss current approaches to flat microtasking, and investigate how to extend these to full microtasking. They point out the problem of dummy waiting in the processor that initiates a parallel loop. To solve this problem, two schemes, dequeue-tasks and dequeue-descendant-tasks, are considered, and their disadvantages are discussed. The proposed switch-stack scheme perfectly solves the problem. These schemes have been implemented in the PARCEL run-time system. The results show that the new scheme nearly always achieves the best performance in execution time and stability
Keywords
parallel programming; PARCEL run-time system; dequeue-descendant-tasks; dequeue-tasks; dummy waiting; execution time; flat microtasking; full microtasking; nested parallel loops; run-time microtasking support; shared-memory multiprocessor; stability; switch-stack scheme; switch-stacks; Availability; Dynamic scheduling; Multiprocessing systems; Multitasking; NASA; Processor scheduling; Research and development; Runtime; Stability; US Department of Energy;
fLanguage
English
Publisher
ieee
Conference_Titel
Supercomputing '90., Proceedings of
Conference_Location
New York, NY
Print_ISBN
0-8186-2056-0
Type
conf
DOI
10.1109/SUPERC.1990.130020
Filename
130020
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