DocumentCode
3014963
Title
Power supply induced jitter modeling of an on-chip LC oscillator
Author
Rokhsaz, Shahriar ; Lu, Jinghui ; Brunn, Brian
Author_Institution
Docket Chips Inc., Austin, TX, USA
fYear
2001
fDate
2001
Firstpage
132
Lastpage
136
Abstract
This paper concentrates on developing a closed-form small signal model to determine the power supply induced jitter (PSIJ) for on chip LC based voltage controlled oscillator (VCO). To determine the source of the PSIJ, we have developed a Mathcad model which is used to optimize the VCO design in order to achieve the lowest possible jitter allowed by its architecture
Keywords
circuit simulation; integrated circuit modelling; integrated circuit noise; jitter; phase locked loops; voltage-controlled oscillators; LC based voltage controlled oscillator; Mathcad model; VCO design; closed-form small signal model; jitter modeling; on-chip LC oscillator; power supply induced jitter; Coupling circuits; Frequency; Inductance; Inductors; Jitter; Parasitic capacitance; Power supplies; Predictive models; Varactors; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Mixed-Signal Design, 2001. SSMSD. 2001 Southwest Symposium on
Conference_Location
Austin, TX
Print_ISBN
0-7803-6742-1
Type
conf
DOI
10.1109/SSMSD.2001.914952
Filename
914952
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