5-GHz low-phase noise quadrature VCO in 0.13−μm RF CMOS process technology

In this paper, a 5 GHz low-phase noise RF CMOS quadrature voltage controlled oscillator (QVCO) is presented. The quadrature signals are generated by coupling two VCOs through pMOS coupling transistors. The tail biasing MOS current mirror is replaced with tail biasing resistor of 100 Omega multifingers gate structure of pMOS varactor (3.125 mum width of each gate finger) and source damping resistor of 40 are the techniques which are used to achieve low phase noise in proposed QVCO. The pMOS varactor releases the frequency tuning range of 5.26% from the center frequency of 5.13 GHz. The proposed QVCO core power dissipation is 3.7 mW from 1.2 V DC power supply. The QVCO exhibits the measured phase noise of -118.24 dBc/Hz at the offset frequency of 1 MHz. The calculated figure of merit is -186.7. The proposed QVCO is implemented utilizing 0.13 mum 1 poly 8 metal RF CMOS process technology.