• DocumentCode
    3019632
  • Title

    FPGA embedded single-cycle 16-bit microprocessor and tools

  • Author

    Morales-Velazquez, L. ; Osornio-Rios, R.A. ; Romero-Troncoso, R.J.

  • Author_Institution
    Eng. Fac., Univ. Autonoma de Queretaro, San Juan del Rio, Mexico
  • fYear
    2012
  • fDate
    5-7 Dec. 2012
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Nowadays embedded processors are one of the most preferred developing methods for FPGA applications, these reduce the time-to-market latency and exploit the designer programming expertise. On the other hand, the most popular embedded processor cores were not designed for FPGA thus they use a big amount of resources. This work presents a new 16-bit processor with a RISC-Harvard modified architecture that executes each instruction in one clock cycle. This work exposes the xQ16v3 architecture and compiling tools. The xQ16v3 was tested by a standard benchmark and it is contrasted with other popular processor cores to evaluate its overall performance.
  • Keywords
    embedded systems; field programmable gate arrays; microprocessor chips; program compilers; reduced instruction set computing; FPGA; RISC-Harvard modified architecture; compiling tools; embedded processors; single-cycle microprocessor; time-to-market latency reduction; xQ16v3 architecture; Arrays; Clocks; Field programmable gate arrays; Interrupters; Program processors; Random access memory; Registers; Embedded microprocessor; FPGA; single-cycle instruction;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reconfigurable Computing and FPGAs (ReConFig), 2012 International Conference on
  • Conference_Location
    Cancun
  • Print_ISBN
    978-1-4673-2919-4
  • Type

    conf

  • DOI
    10.1109/ReConFig.2012.6416749
  • Filename
    6416749