DocumentCode
3019809
Title
Effect of flag design on thermal performance of PBGA packages
Author
Joiner, B.
Author_Institution
Semicond. Products Sector, Motorola Inc., Austin, TX
fYear
2001
fDate
2001
Firstpage
223
Lastpage
227
Abstract
In order to meet performance requirements, the package design of the 272 27×27 mm PBGA package must incorporate the best possible thermal path from the die to the printed circuit board to which the package is attached. Unfortunately, the reliability requirements for passing moisture resistance are more easily passed with a minimum amount of copper under the die. This paper reports finite element thermal simulations predicting the effect of the design options on thermal performance. Switching from a solid flag with a solid spreader pad on the bottom of the substrate to a minimal copper design would cause about 3 to 6°C/watt increase in junction temperature
Keywords
ball grid arrays; circuit simulation; finite element analysis; integrated circuit design; integrated circuit modelling; integrated circuit packaging; integrated circuit reliability; plastic packaging; thermal analysis; thermal management (packaging); 27 mm; Cu; PBGA packages; copper; design options; finite element thermal simulations; flag design; junction temperature; minimal copper design; moisture resistance; package attachment; package design; performance requirements; printed circuit board; reliability; solid flag; solid spreader pad; thermal path; thermal performance; Copper; Finite element methods; Moisture; Semiconductor device packaging; Semiconductor device testing; Solid modeling; Substrates; Temperature; Thermal conductivity; Thermal resistance;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Thermal Measurement and Management, 2001. Seventeenth Annual IEEE Symposium
Conference_Location
San Jose, CA
Print_ISBN
0-7803-6649-2
Type
conf
DOI
10.1109/STHERM.2001.915182
Filename
915182
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