DocumentCode
3020568
Title
Run-Time Reconfiguration Support for FPGAs with Embedded CPUs: The Hardware Layer
Author
Ferreira, João Canas ; Silva, Miguel M.
Author_Institution
FEUP, Portugal
fYear
2005
fDate
04-08 April 2005
Abstract
We report on work in progress that aims to provide a run-time management kernel for applications running on FPGAs with embedded CPUs. We describe the global concept, the organization of the hardware environment for the reconfigurable modules and the reconfiguration strategy supported by the run-time management kernel. Practical issues concerning the implementation of the system on a Virtex-II Pro-based board are also addressed.
Keywords
embedded systems; field programmable gate arrays; operating system kernels; reconfigurable architectures; FPGA; Virtex-II Pro-based board; embedded CPU; reconfigurable module; reconfiguration strategy; run-time management kernel; run-time reconfiguration; Central Processing Unit; Circuits; Engineering management; Environmental management; Fabrics; Field programmable gate arrays; Hardware; Kernel; Memory management; Runtime environment;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International
Print_ISBN
0-7695-2312-9
Type
conf
DOI
10.1109/IPDPS.2005.385
Filename
1420031
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