Design of a low-cost low-power baseband-processor for UHF RFID tag with asynchronous design technique

A low-cost low-power baseband processor for passive UHF RFID Tag based on EPC C1G2 protocol is presented in this paper. In order to minimize the power consumption, a novel digital baseband architecture is proposed and a series of low-power design approaches are adopted, including asynchronous design, clock-gating, low operating frequency, reuse of registers, etc. The baseband processor supports eleven mandatory commands and one optional command (Access) and the C1G2 protocol is completely fulfilled. The whole Tag (including a 1K EEPROM, RF/Analog frontend and the low-power baseband processor) is fabricated in 0.18μm CMOS technology. Real measurements on the final chip indicate that the processor consumes less than 2.7μW at 1V supply voltage and occupies an area of 0.11 mm².