DocumentCode
3023051
Title
Multi-purpose systems: A novel dataflow-based generation and mapping strategy
Author
Nezan, J. -F ; Siret, N. ; Wipliez, M. ; Palumbo, F. ; Raffo, L.
Author_Institution
IETR, Eur. Univ. of Brittany, Rennes, France
fYear
2012
fDate
20-23 May 2012
Firstpage
3073
Lastpage
3076
Abstract
The manual creation of specialized hard-ware infrastructures for complex multi-purpose systems is error-prone and time-consuming. Moreover, lots of effort is required to define an optimized and heterogeneous components library. To tackle these issues, we propose a novel design flow based on the Dataflow Process Networks Model of Computation. In particular, we have combined the operation of two state of the art tools, the Multi-Dataflow Composer and the Open RVC-CAL Compiler, handling respectively the automatic mapping of a reconfigurable multi-purpose substrate and the high level synthesis of hardware components. Our approach guarantees runtime efficiency and on-chip area saving both on FPGAs and ASICs.
Keywords
application specific integrated circuits; field programmable gate arrays; high level synthesis; ASIC; FPGA; automatic mapping strategy; dataflow process network model; dataflow-based generation; hardware infrastructure; heterogeneous component library; high level synthesis; multidataflow composer; open RVC-CAL compiler; reconfigurable complex multipurpose substrate system; Field programmable gate arrays; Hardware; Libraries; Multiaccess communication; Runtime; Software; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location
Seoul
ISSN
0271-4302
Print_ISBN
978-1-4673-0218-0
Type
conf
DOI
10.1109/ISCAS.2012.6271969
Filename
6271969
Link To Document