• DocumentCode
    3024353
  • Title

    PyCO: A parallel genetic algorithm optimization tool for analog circuits

  • Author

    Rabuske, Taimur G. ; Pinheiro, Renan B. ; Fernandes, Jorge ; Rodrigues, Cesar R.

  • Author_Institution
    Microelectron. Group, Fed. Univ. of Santa Maria (UFSM), Santa Maria, Brazil
  • fYear
    2012
  • fDate
    20-23 May 2012
  • Firstpage
    3266
  • Lastpage
    3269
  • Abstract
    Analog designers are challenged by increasingly complex device models and lowered signal swing as the CMOS processes scale. At the same time, new trends and emerging technologies pose tighter design constraints. However, the cheap computational resources nowadays enable the use of the mature electrical simulators and device models in simulation-in-a-loop optimization techniques. In this work, we present a flexible circuit optimization tool for analog designs which relies on evolutionary algorithms. Moreover, we employ logistic functions to determine the fittest individuals. The benchmarking test shows that the program is able to dimension an operational transconductance amplifier (OTA) based on the topology netlist in less than 15 minutes, without resorting to any knowledge base, initial guess or simplified models. The achieved performance suggests that the tool may be integrated in an existing design flow with huge benefits.
  • Keywords
    CMOS integrated circuits; analogue integrated circuits; circuit optimisation; genetic algorithms; integrated circuit design; network topology; operational amplifiers; parallel algorithms; CMOS processes scale; OTA; PyCO; analog circuits; benchmarking test; cheap computational resources; complex device models; electrical simulators; evolutionary algorithms; flexible circuit optimization tool; knowledge base; logistic functions; operational transconductance amplifier; parallel genetic algorithm optimization tool; pose tighter design constraints; signal swing; simulation-in-a-loop optimization techniques; topology netlist; Analog circuits; Circuit optimization; Computational modeling; Genetic algorithms; Logistics; Mathematical model;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
  • Conference_Location
    Seoul
  • ISSN
    0271-4302
  • Print_ISBN
    978-1-4673-0218-0
  • Type

    conf

  • DOI
    10.1109/ISCAS.2012.6272022
  • Filename
    6272022