High speed direct digital frequency synthesizer with pipelining phase accumulator based on Brent-Kung adder

This paper presents a high speed direct digital frequency synthesizer (DDFS) using pipelining phase accumulator (PA) with a modified parallel prefix adder based on Brent-Kung (BK) adder. The proposed 32-bit phase accumulator design consists of four pipeline stages, with 8-bit Registers and modifying 8-bit Brent-Kung adder in each stage with carries ripple between the stages. The proposed architecture with modifying 8-bit Brent-Kung adder has been implemented on Cyclone III FPGA kit. A comparison with conventional phase accumulator that using ripple carry adder (RCA) has been made and the results shown that the proposed architecture performs 24.9% faster than the conventional phase accumulator.