DocumentCode
3028233
Title
A Compilation- and Simulation-Oriented Architecture Description Language for Multicore Systems
Author
Stripf, Timo ; Oey, Oliver ; Bruckschloegl, Thomas ; Koenig, R. ; Becker, Jurgen ; Goulas, George ; Alefragis, Panayiotis ; Voros, Nikolaos S. ; Potman, Jordy ; Sunesen, Kim ; Derrien, Steven ; Sentieys, Olivier
Author_Institution
Karlsruhe Inst. of Technol., Karlsruhe, Germany
fYear
2012
fDate
5-7 Dec. 2012
Firstpage
383
Lastpage
390
Abstract
Today´s reconfigurable multicore architectures become more and more complex. They consist of several processing units, not necessarily identical, different interconnecting modules, memories and possibly other components. Programming such kind of architectures requires deep knowledge of the underlying hardware and is thus very time consuming and error prone. On the other hand, automated tool chains that target multicore architectures are typically tailored to one specific architecture type and require a platform-specific programming model. Within the EU FP7 project Architecture oriented paraLlelization for high performance embedded Multicore systems using scilAb (ALMA) we address this shortcoming by a flexible tool chain featuring platform-independence on the architecture level as well as on the programming model. Thus, the tool chain is kept retarget able by using a novel architecture description language (ADL) for multiprocessor system on chip devices. Applications are expressed using the Scilab programming language allowing the end user to develop optimized programs without specific knowledge of the target architectures. Thereby, the ADL guides the code generation of the integrated tool flow through coarse- and fine grain parallelism extraction, parallel code optimizations and multicore simulations.
Keywords
multiprocessing systems; parallel architectures; program compilers; reconfigurable architectures; specification languages; system-on-chip; ADL; ALMA; EU FP7 project architecture oriented parallelization; Scilab programming language; automated tool chains; code generation; compilation-oriented architecture description language; error prone; high performance embedded multicore systems; interconnecting modules; multiprocessor system on chip devices; optimized programs; platform-specific programming model; processing units; reconfigurable multicore architectures; scilAb; simulation-oriented architecture description language; target architectures; Data mining; Estimation; Hardware; Microarchitecture; Multicore processing; Parallel processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Computational Science and Engineering (CSE), 2012 IEEE 15th International Conference on
Conference_Location
Nicosia
Print_ISBN
978-1-4673-5165-2
Electronic_ISBN
978-0-7695-4914-9
Type
conf
DOI
10.1109/ICCSE.2012.60
Filename
6417319
Link To Document