DocumentCode
3031515
Title
Robust FPGA intellectual property protection through multiple small watermarks
Author
Lach, John ; Mangione-Smith, William H. ; Potkonjak, Miodrag
Author_Institution
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
fYear
1999
fDate
1999
Firstpage
831
Lastpage
836
Abstract
A number of researchers have proposed using digital marks to provide ownership identification for intellectual property. Many of these techniques share three specific weaknesses: complexity of copy detection, vulnerability to mark removal after revelation for ownership verification, and mark integrity issues due to partial mark removal. This paper presents a method for watermarking field programmable gate array (FPGA) intellectual property (IP) that achieves robustness by responding to these three weaknesses. The key technique involves using secure hash functions to generate and embed multiple small marks that are more detectable, verifiable, and secure than existing IP protection techniques
Keywords
application specific integrated circuits; copy protection; field programmable gate arrays; industrial property; integrated circuit design; FPGA; copy detection; mark integrity issues; mark removal; multiple small marks; multiple small watermarks; ownership identification; robust intellectual property protection; secure hash functions; Field programmable gate arrays; Fingerprint recognition; Intellectual property; Permission; Protection; Reverse engineering; Robustness; Security; Table lookup; Watermarking;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1999. Proceedings. 36th
Conference_Location
New Orleans, LA
Print_ISBN
1-58113-092-9
Type
conf
DOI
10.1109/DAC.1999.782152
Filename
782152
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