Proposed on-chip test structure to quantify trap densities within flash meories

Author

Verma, Vandana ; Swaneck, Andrew

Author_Institution

Intel Corporation

fYear

1996

fDate

1996

Firstpage

Lastpage

Keywords

Acceleration; Electric variables; Electron traps; Flash memory cells; Grounding; Nonvolatile memory; Scattering; Testing; Turning; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Memory Technology, Design and Testing, 1996. Records of the 1996 IEEE International Workshop on

ISSN

1087-4852

Print_ISBN

0-8186-7466-0

Type

DOI

10.1109/MTDT.1996.782486

Filename

782486

Link To Document