DocumentCode
3037642
Title
Research of the Logic Chip Boolean Relationship Extracted Ways Based on Limited Waveform Space
Author
Xiao, Da ; Zhu, Yue-Fei ; Li, Qing-bao ; Zhang, Hong-bo ; Song, Pu
Author_Institution
Dept. of Network Eng., ZhengZhou Inf. Sci. Univ., Zhengzhou
fYear
2009
fDate
8-10 March 2009
Firstpage
281
Lastpage
286
Abstract
Aiming at the technique crux of system failure testing and function reconstruction, we carry on a research to the distilling method of the Boolean relation data. First, start with the analysis to the working wave character of target chip in the waveform confined space of system, and then on this foundation, the corresponding logic relation expression between signals of different logic types is given. While aiming at the combination logic waveform, and also integrating with the analysis to the fixed time relation of the waveform and the feature of its waveform data, we have put forward and carried out the logic relation distilling algorithm of the combination circuit signals based on credibility interval. While aiming at the timing logic waveform and on the foundation of the analysis to the different timing logic types, as well as the analysis to the waveform timing feature, we have put forward and carried out the logic relation distilling algorithm of the timing circuit signals based on waveform decomposition. Through the extraction of corresponding logic relation between different signals, the implicit logic relation of the circuit inner is translated into the limited set value of the logic relation expression which the logic synthesis can identify. And then from the angle of corresponding relation of the different signal logic values, the logic function of circuit is described.
Keywords
Boolean algebra; logic circuits; logic testing; microprocessor chips; Boolean relationship; function reconstruction; logic chip; logic relation distilling algorithm; logic relation expression; logic waveform; system failure testing; waveform space; Algorithm design and analysis; Computer science; Data engineering; Failure analysis; Information science; Logic circuits; Logic functions; Logic testing; Signal analysis; Timing; Boolean relationship; Faults testing; Logic chip; Restruction; limited Waveform space;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer and Automation Engineering, 2009. ICCAE '09. International Conference on
Conference_Location
Bangkok
Print_ISBN
978-0-7695-3569-2
Type
conf
DOI
10.1109/ICCAE.2009.41
Filename
4804533
Link To Document