DocumentCode
3037978
Title
Synergistic Temperature and Energy Management in GALS Processor Architectures
Author
Zhu, YongKang ; Albonesi, David H.
Author_Institution
Dept. of Electr. & Comput. Eng., Rochester Univ., NY
fYear
2006
fDate
4-6 Oct. 2006
Firstpage
55
Lastpage
60
Abstract
We propose a synergistic temperature and energy management scheme for GALS processors. Localized DVS is applied in domains that contain hotspots, permitting other critical domains to run unabated, thereby reducing performance cost relative to global DVS, and also creating execution slack in peripheral cooler domains that can be exploited to save energy. The reduction in energy in turn creates a steeper temperature gradient between the domains, permitting heat to flow more easily out of the hotspot domain. This symbiotic cyclical relationship between temperature and energy management leads to both significantly better performance, and lower energy, than the use of DTM alone
Keywords
asynchronous circuits; logic design; low-power electronics; microprocessor chips; GALS processor architectures; dynamic temperature management; dynamic voltage scaling; energy management; hotspot domain; symbiotic cyclical relationship; synergistic temperature management scheme; Clocks; Costs; Dynamic voltage scaling; Energy management; Frequency; Logic; Microprocessors; Temperature; Thermal management; Voltage control; Dynamic Temperature Management (DTM); Dynamic Voltage Scaling (DVS); Performance; Reliability;
fLanguage
English
Publisher
ieee
Conference_Titel
Low Power Electronics and Design, 2006. ISLPED'06. Proceedings of the 2006 International Symposium on
Conference_Location
Tegernsee
Print_ISBN
1-59593-462-6
Type
conf
DOI
10.1109/LPE.2006.4271807
Filename
4271807
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