Signal processor retrofit for air search radar

An approach for improving the performance of existing air search radars by retrofitting the signal processor while leaving the RF hardware and digital data processor (DDP) essentially unchanged is proposed. By using improved algorithms and computational accuracy, the 1.7-dB reduction in processing losses described by C.S. Miller et al. (1990) can be achieved and an additional 3-dB improvement in signal-to-clutter noise ratio is provided by doubling the bandwidth. By using a smooth sensitivity time control (STC) function to replace the 6- and 12-dB steps, the worst-case 0.6-dB loss suffered by the present system is reduced to zero. A 12-dB gain in dynamic range can be obtained by replacing the 12-b A/D converters with 14-b devices. Other improvements mentioned involved the use of multiple moving target indicator (MIT) filters to provide a means of sorting the target detections according to a coarse estimate of the target velocity, and the use of a clutter map and modern thresholding algorithms.<>