DocumentCode
3038659
Title
Verification Tool and Unified Specifications for Embedded Software
Author
Yatabe, Shunsuke
Author_Institution
Res. Center for Verification & Semantics, Nat. Inst. of Adv. Ind. Sci. & Technol., Toyonaka, Japan
fYear
2009
fDate
17-17 March 2009
Firstpage
127
Lastpage
131
Abstract
In the extended abstract, our on-going research project Verification Tool and Unified Specifications for Embedded Software is explained. In the project, we are developing an upper-process support tool that helps ones formalize specifications of embedded software and verify a certain type of consistency and correctness unless formal method background is equipped. The tool is based on a proof assistant system (Agda) and a software development system (VDM tools), but is designed with the concept of lightweight formal methods. The project is being promoted as joint research with CSK systems West Japan, CSK systems and Macs co. ltd, under the program of the Ministry of Economy, Trade and Industry.
Keywords
embedded systems; formal specification; formal verification; software tools; theorem proving; Agda; CSK systems; Macs Co. Ltd; Ministry of Economy, Trade and Industry; VDM tools; embedded software; formal method background; formalize specifications; lightweight formal methods; proof assistant system; software development system; unified specifications; upper-process support tool; verification tool; embedded software; upper-process; verification;
fLanguage
English
Publisher
ieee
Conference_Titel
Future Dependable Distributed Systems, 2009 Software Technologies for
Conference_Location
Tokyo
Print_ISBN
978-0-7695-3572-2
Electronic_ISBN
978-0-7695-3572-2
Type
conf
DOI
10.1109/STFSSD.2009.33
Filename
4804585
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