Delay Fault Testability on Two-Rail Logic Circuits

The importance of redundant technologies for improving dependability and delay fault testability are growing. This paper presents properties of a class of redundant technologies, namely two-rail logic, and discusses testability of path delay faults occurring on two-rail logic circuits. The paper reveals the following characteristics of two-rail logic circuits: While the number of paths in two-rail logic circuits is just twice that in ordinary single-rail logic circuits, the number of robust testable path delay faults in two-rail logic circuits is twice or more that in the single-rail logic circuits. This suggests two-rail logic circuits are more testable than ordinary single-rail logic circuits. On two-rail logic circuits, path delay faults are always functional sensitizable and may be robust testable. Even if faults that no codeword input vectors functionally sensitize occur, the circuits are still strongly fault secure for unidirectional stuck-at faults as well as they work correctly.