• DocumentCode
    3042572
  • Title

    Reconfigurable Android with an FPGA Accelerator for the Future Embedded Devices

  • Author

    Nakajo, Hironori ; Koike, Keisuke ; Ohta, Atsushi ; Ohshima, Kohta ; Fujinami, Kaori

  • Author_Institution
    Tokyo Univ. of Agric. & Technol., Koganei, Japan
  • fYear
    2011
  • fDate
    Nov. 30 2011-Dec. 2 2011
  • Firstpage
    173
  • Lastpage
    178
  • Abstract
    We have implemented an FPGA accelerator, which realizes higher performance by executing a part of a Java source code executable in hardware, to accelerate Java execution in an Android mobile terminal. Between an Intel Atom processor which executes a Dalvik virtual machine and an FPGA accelerator, we have implemented PCI Express interface which performs high speed communication of 1.25 Gbps with DMA transfer in our experimental environment. In this paper, acceleration of Android with an FPGA accelerator is described. Communication performance between a processor and an FPGA has been measured and the performance of image processing with the acceleration is evaluated.
  • Keywords
    Java; field programmable gate arrays; operating systems (computers); peripheral interfaces; smart phones; virtual machines; DMA transfer; Dalvik virtual machine; FPGA accelerator; Intel Atom processor; Java execution; Java source code; PCI Express interface; future embedded devices; image processing; reconfigurable Android mobile terminal; Acceleration; Androids; Field programmable gate arrays; Hardware; Java; Random access memory; Smart phones; Android; FPGA; Hardware Acceleration; PCI Express;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Networking and Computing (ICNC), 2011 Second International Conference on
  • Conference_Location
    Osaka
  • Print_ISBN
    978-1-4577-1796-3
  • Type

    conf

  • DOI
    10.1109/ICNC.2011.33
  • Filename
    6131803