Variability-aware automated sizing of analog circuits considering discrete design parameters

During analog design, the values of circuit parameters like transistor lengths and widths must be assigned, such that performance specifications are fulfilled for various operating conditions. Additionally, the design should be robust against process variations. The sizing must consider discrete design parameters, e.g., to model multipliers or manufacturing grids. Currently, no tools are available to consider both, process variations and discrete design parameters. This paper presents a new method for this task, which is based on SQP, Branch-and-Bound, and Realistic Worst-Case-Analysis. Simulation results in comparison with Monte Carlo analyses for two amplifiers illustrate the efficiency of the method and show the robustness of the results against variations in operating conditions and process parameters.