• DocumentCode
    3044362
  • Title

    Research on Image Median Filtering Algorithm and Its FPGA Implementation

  • Author

    Hu, Yueli ; Ji, Huijie

  • Author_Institution
    Key Lab. of Adv. Display & Syst. Applic., Shanghai Univ., Shanghai, China
  • Volume
    3
  • fYear
    2009
  • fDate
    19-21 May 2009
  • Firstpage
    226
  • Lastpage
    230
  • Abstract
    Image filtering plays an important role in image preprocessing. The median filters, including the standard median filter and the multi-level median filter, which can preserve image features and thin lines are introduced and discussed in detail. After that, the FPGA based solution for the algorithms of these two filters are presented. This paper also gives account to the FPGA implementation of the complete structure of a general filter including the filtering window generating module and the row-column counting module. RTL level simulation is performed in Modelsim to verify the functional correctness and system level simulation is performed in Matlab to compare the filtering effect.
  • Keywords
    field programmable gate arrays; image processing; median filters; FPGA implementation; Matlab; filtering window generating module; image median filtering algorithm; multilevel median filter; row-column counting module; Application software; Application specific integrated circuits; Computational modeling; Digital signal processing; Field programmable gate arrays; Filtering algorithms; Filters; Hardware; Parallel processing; Signal processing algorithms; FPGA implementation; image preprocessing; mean filter; median filter; noise detection;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Intelligent Systems, 2009. GCIS '09. WRI Global Congress on
  • Conference_Location
    Xiamen
  • Print_ISBN
    978-0-7695-3571-5
  • Type

    conf

  • DOI
    10.1109/GCIS.2009.130
  • Filename
    5209155